1. Technical Field
The present invention relates to a hetero field effect transistor using a gallium indium nitride arsenide based epitaxial wafer, to a method of fabricating the hetero field effect transistor, and to a transmitter-receiver using the hetero field effect transistor.
2. Related Art
A hetero field effect transistor such as a high electron mobility transistor (HEMT) is a compound semiconductor device using a two-dimensional electron gas formed by a hetero structure.
FIG. 13 shows a conventional HEMT as a first prior art example of such HEMT, comprising an InAlAs carrier supply layer/an InGaAs channel layer/an InAlAs buffer layer formed on an InP substrate. In FIG. 13, reference numerals 1 to 7 denote an electrode metal, an n+-InGaAs cap layer, an n-InAlAs carrier supply layer, an i-InAlAs spacer layer, an i-InGaAs channel layer, an i-InAlAs buffer layer, and a semi-insulating InP substrate (S.I.-InP substrate), respectively. The HEMT comprising InGaAs as the channel layer 5 exhibits a good high-frequency characteristic because of a high electron transport characteristic thereof, in contrast to an HEMT comprising GaAs as a channel layer. Especially, the first prior art example is characterized by inserting an InAs layer 8 with a thickness of 1 to 7 nm into the InGaAs channel layer 5 at a position 0 to 6 nm away from the InAlAs spacer layer 4 (see Japanese Laid-Open Patent Application Publication No. Hei. 5-36726).
FIG. 14 shows a conventional HEMT as a second prior art example, comprising a GaInNAs channel layer formed on a GaAs substrate. Specifically, the HEMT is structured such that an undoped GaAs buffer layer 12 with a thickness of 0.5 μm is provided on a semi-insulating GaAs substrate 11, and an undoped GaInNAs channel layer 13 with a thickness of 15 nm is provided on the buffer layer 12. Further, in this HEMT, an n-type AlGaAs carrier supply layer 14 with a thickness of 50 nm is provided on the GaInNAs channel layer 13, with an undoped AlGaAs spacer layer 16 with a thickness of 2 nm disposed between the channel layer 13 and the carrier supply layer 14, and an electrode 18 is formed by evaporation on the AlGaAs carrier supply layer 14. Al compositions of the spacer layer 16 and of the carrier supply layer 14 are both 0.28 (see Japanese Laid-Open Patent Application Publication No. 2000-164852).
In the first prior art example, however, when the InAs layer 8 is inserted as described above, a lattice mismatching arises, thereby causing defects to occur if the InAs layer 8 has a film thickness not less than a critical film thickness. Therefore, the thickness of the channel layer 8 needs to be less than the critical thickness, so that sufficient carrier density can not be realized and therefore the characteristic is not improved sufficiently.
On the other hand, in the second prior art example, N is introduced into InGaAs composing the channel layer 13, in order to solve problems associated with characteristic which are caused by difficulty of lattice matching of the InGaAs layer with respect to the GaAs substrate, when the InGaAs layer is formed on the GaAs substrate 11. In the second prior art example, the channel layer 13 comprising GaInNAs lattice matches to the GaAs substrate 11. Therefore, the characteristic is indeed improved in contrast with a case where the InGaAs channel layer is formed on the GaAs substrate 11. However, a characteristic better than that of the first prior art example in which the InGaAs channel layer is formed on the InP substrate is not realized.